Selection Guide
System Block Diagram
Overview
CH32H417 is an interconnected general-purpose microcontroller designed based on QingKe RISC-V5F and RISC-V3F dual cores. CH32H417 integrates USB 3.2 Gen1 controller and transceiver, 100M Ethernet MAC and PHY, SerDes high-speed isolated transceiver, Type-C/PD controller and PHY, provides SD/EMMC controller, 500MBytes universal high-speed interface UHSIF, DVP, SWPMI, PIOC, FMC, DFSDM, LTDC, GPHA, DMA Controller, multi-timers, 8 UARTs, I3C, 4 groups of I2C, 2 groups of QSPI, 4 groups of SPI, 2 groups of I2S, 3 groups of CAN and other peripheral resources. Built-in 5M sampling rate dual 12-bit ADC unit, 20M sampling rate 10-bit high-speed HSADC unit, 16-channel touch-key, dual DAC unit, 3 groups of OPA, voltage CMP and other analog resources, support 10M/100M Ethernet communication. It supports USB 2.0 and USB 3.0, USB Host and USB Device, Type-C and PDUSB fast charging, SerDes high-speed isolation and remote transmission, and dual-core division of labor to improve the efficiency of network protocol processing and communication response speed.
Features
- Dual-core structure: QingKe RISC-V5F and RISC-V3F
- V5F up to 400MHz, V3F up to 160MHz
- 896KB SRAM，960KB Flash
- System power supply rated 3.3V
- Regular GPIO power supply rated at 3.3V, supports 1.8V
- High-speed GPIO power supply optional 1.2/1.8/2.5/3.3V
- 2 groups totally 16 channels general-purpose DMA controller
- 2 groups of 12-bit ADCs, sampling rate up to 5Msps, support dual ADC conversion mode
- 1 group of 10-bit high-speed analog-to-digital HSADCs, sampling rate up to 20Msps
- 16-channel touch-key channel detection
- 2 groups of 12-bit DACs
- 32-bit width 125MHz UHSIF
- 150MHz DVP
- 200MHz dual-edge SD/EMMC controller (SDMMC)
- SDIO master/slave interface: supports SD/SDIO/MMC ports
- Single-wire Protocol Master Interface SWPMI
- Programmable Protocol I/O Controller PIOC
- Ethernet Controller MAC and 10M/100M PHY
- 5Gbps SuperSpeed USB 3.0 Controller and PHY
- 480Mbps High-speed USB 2.0 Controller and PHY
- Full-speed USB2.0 controller and PHY
- Remote SerDes controllers and PHYs, support kilovolt-level high-voltage signal isolation transmission
- USB PD and Type-C controllers and PHYs
- 1-group Analog Voltage CMP
- 3-groups OPA/PGA/CMP
- 2×16-bit advanced-control timers, 4×16-bit and 4×32-bit general-purpose timers
- 2×16-bit basic timers, 2×16-bit low-power timers
- 2 Watchdog timers (IWDG and WWDG), 2×32-bit SysTick
- 8 groups of USART, 4 groups of I2C interface, 1 group of I3C interface
- 4 groups of SPI interface, 2 groups of QuadSPI interface, 3 groups of CAN interface (2.0B active)
- Digital Filter for Sigma Delta Modulator
- Serial Audio Interface SAI
- DCT-TFT Display Controller LTDC
- Graphics Processing Hardware Accelerator GPHA
- Flexible Storage Controller FMC
- 95 I/Os, mapping 16 external interrupts
- ECDC encryption module
- 1-wire (default) and 2-wire debugging modes
- Package form: QFN128, QFN88, QFN68, QFN60X6